Search - verilog testbench

[VHDL-FPGA-Verilog] counter

Description: VHDL计数器的TestBench，适合初学者-VHDL counter TestBench, suitable for beginners
Platform: | Size: 1024 | Author: hbsun | Hits:

[VHDL-FPGA-Verilog] I2C_HDL

Description: I2C bus HDL source and testbench
Platform: | Size: 701440 | Author: liuKe | Hits:

[Other Embeded program] or1200

Description: or1200的内核以及一些参考文献，是Verilog的RTL级描述。-or1200 core as well as some references, is the RTL-level Verilog description.
Platform: | Size: 2004992 | Author: | Hits:

[Other] ArtofWritingTestBenches

Description: Art of Writing TestBenches：极经典的testbench书写入门书籍，能够让初学者在短时间内掌握testbench的书写步骤，对testbench有一个初步的认识，这是一个verilog方面的，没找到verilog就选了开发环境为vhdl-Art of Writing TestBenches: very classic entry Testbench writing books, that allows beginners to master in a short time Testbench writing steps Testbench have a preliminary understanding, this is a Verilog area, could not find Verilog development environment on selected for VHDL
Platform: | Size: 97280 | Author: 侯浩 | Hits:

[VHDL-FPGA-Verilog] DCT

Description: altera fpga verilog 设计的基于查找表的DCT程序及zigzag扫描程序，已经过matlab 和modelsim 验证，文件中包含TESTBENCH ，直接可用-altera fpga verilog design table DCT-based search procedures and zigzag scanning procedures, and ModelSim matlab has been verified, the document contains TESTBENCH, directly available
Platform: | Size: 15400960 | Author: alison | Hits:

[VHDL-FPGA-Verilog] rom

Description: 我用VHDL写的正弦，用FPGA内部ROM，有仿真testbench,在quartus里可以运行。在板子里已经验证-I used to write VHDL sinusoidal, using FPGA internal ROM, has simulation testbench, you can run in Quartus. Yard has already been verified in the plates
Platform: | Size: 651264 | Author: jimmy | Hits:

[VHDL-FPGA-Verilog] PWM

Description: 脉冲宽度调制，VHDL代码编写，包括QUARTUSII和MODELSIM工程以及testbench-Pulse width modulation, VHDL coding, including QUARTUSII and ModelSim engineering and Testbench
Platform: | Size: 348160 | Author: horse | Hits:

[VHDL-FPGA-Verilog] SPI_FireWall

Description: verilog spi file with testbench
Platform: | Size: 2934784 | Author: xgh | Hits:

[VHDL-FPGA-Verilog] VCchuankou

Description: verilog ADPLL file with testbench
Platform: | Size: 206848 | Author: xgh | Hits:

[VHDL-FPGA-Verilog] sha-1

Description: 本算法基于leon2协处理器接口标准，内含testbench，在modelsim中仿真通过，在ise9.2中综合及后仿真通过。-The algorithm is based on the leon2 co-processor interface standard, including testbench, ModelSim simulation in the adoption, in ise9.2 integrated and adopted after the simulation.
Platform: | Size: 15360 | Author: ninghuiming | Hits:

[ARM-PowerPC-ColdFire-MIPS] risc

Description: 嵌入式risc处理器源码，包含设计文档，原理图，testbench，及外围接口，使用verilog实现。-Source embedded RISC processors, including design documents, schematics, testbench, and peripheral interfaces, the use of Verilog to achieve.
Platform: | Size: 129024 | Author: 李林 | Hits:

[VHDL-FPGA-Verilog] adder4

Description: 是用verilog写得加法器以及计数器里面有测试文件（testbench），对于初学者来说这个可以用来参考下-Is written in Verilog adder and counter inside a test file (testbench), for beginners this can be used to reference the next
Platform: | Size: 1024 | Author: olive | Hits:

[VHDL-FPGA-Verilog] custom_cordic

Description: verilog编程开发的cordic例程，计算SIN,COS功能与计算幅值角度功能可设定，运算宽度可设定，并有完善的TESTBENCH。-Verilog programming developed CORDIC routines to calculate SIN, COS function and calculating the amplitude of the perspective of function can be set, computing the width can be set, and perfect TESTBENCH.
Platform: | Size: 119808 | Author: yangyu | Hits:

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[VHDL-FPGA-Verilog] counter

[VHDL-FPGA-Verilog] I2C_HDL

[Other Embeded program] or1200

[Other] ArtofWritingTestBenches

[VHDL-FPGA-Verilog] DCT

[VHDL-FPGA-Verilog] rom

[VHDL-FPGA-Verilog] PWM

[VHDL-FPGA-Verilog] SPI_FireWall

[VHDL-FPGA-Verilog] VCchuankou

[VHDL-FPGA-Verilog] sha-1

[ARM-PowerPC-ColdFire-MIPS] risc

[VHDL-FPGA-Verilog] adder4

[VHDL-FPGA-Verilog] custom_cordic

[SCM] 8051_IP_Verilog

[Embeded-SCM Develop] i2c_core

[VHDL-FPGA-Verilog] rs-codec-8-16

[VHDL-FPGA-Verilog] bin2bcd

[VHDL-FPGA-Verilog] register

[VHDL-FPGA-Verilog] rom_table

[Embeded-SCM Develop] FPGA-PCI

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